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MAX3948 11.3gbps, low-power, dc-coupled laser driver ????????????????????????????????????????????????????????????????? maxim integrated products 1 general description the MAX3948 is a 3.3v, multirate, low-power laser diode driver designed for ethernet, fibre channel, and sonet transmission systems at data rates up to 11.3gbps. this device is optimized to drive a differential transmitter optical subassembly (tosa) with a 25 i flex circuit. the unique design of the output stage enables dc-coupling to unmatched tosas, thereby lowering transmitter power consumption by more than 100mw. the MAX3948 receives differential ac-coupled signals with on-chip termination. it can deliver laser modula - tion currents of up to 85ma at an edge speed of 26ps (20% to 80%) into a 5 i external differential load. the device is designed to have a high-bandwidth differen - tial signal path with on-chip back termination resistors integrated into its outputs. an input equalization block can be activated to compensate for sfp+/qsfp+ host connector losses. the integrated dc circuit provides programmable laser dc currents up to 61ma. both the laser dc current generator and the laser modulator can be disabled from a single pin. the device offers one dedicated pin (vsel) to program up to four channel addresses for multichannel applications. the use of a 3-wire digital interface reduces the pin count while permitting adjustment of input equalization, polar - ity, output deemphasis, and modulation and dc currents without the need for external components. the MAX3948 is available in a 3mm x 3mm, 16-pin tqfn package, and is specified for the -40 n c to +95 n c extended temperature range. applications 40gbase-lr4 qsfp+ optical transceivers 10gbase-lr sfp+ optical transceivers 10gbase-lrm sfp+ optical transceivers oc192-sr sfp+ sdh/sonet transceivers benefits and features s lowest power consumption ? 168mw typical ic power dissipation at 3.3v (ld mod = 40ma, ld dc = 20ma) ? 383mw total transmitter power dissipation at 3.3v including ld mod = 40ma, ld dc = 20ma ? enables < 1w maximum total sfp+ module power dissipation ? enables < 2.5w maximum total qsfp+ module power dissipation s saves board space ? small 3mm x 3mm package ? dc-coupling to the laser reduces external component count s flexibility ? operate up to four MAX3948 ics over single 3-wire digital interface ? programmable modulation current up to 85ma (5 load) ? programmable dc current up to 61ma (translates to up to 100ma laser bias current) ? programmable input equalization and output deemphasis s safety ? supports sff-8431 sfp+ msa and sff-8472 digital diagnostic ? integrated eye safety features with maskable faults ? dc current monitor 19-5943; rev 0; 6/11 ordering information appears at end of data sheet. e v a l u a t i o n k i t a v a i l a b l e for information on other maxim products, visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 MAX3948 11.3gbps, low-power, dc-coupled laser driver v cc , v cct ............................................................ -0.3v to +4.0v |v cc - v cct | ..................................................................... < 0.5v voltage range at tin+, tin-, disable, sda, scl, csel, vsel, fault, and bmon ...... -0.3v to v cc voltage range at vout and toutc ....... 0.4v to (v cct - 0.4v) voltage range at touta ........... (v cct - 1.3v) to (v cct + 1.3v) current range into tin+ and tin- .................. -20ma to +20ma current range into vout ................................. -2ma to +90ma current into toutc and touta .................................. +150ma continuous power dissipation (t a = +70 n c) tqfn (derate 20.8mw/ n c above +70 n c) ............... 1666.7mw storage temperature range .......................... -55 n c to +150 n c die attach temperature ................................................. +400 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c tqfn junction-to-ambient thermal resistance ( b ja ) .......... 48 n c/w junction-to-case thermal resistance ( b jc ) ............... 10 n c/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v cc = v cct = 2.95v to 3.63v, t a = -40 n c to +95 n c; typical values are at v cc = v cct = 3.3v, t a = +25 n c, ld dc = 20ma, ld mod = 40ma, and 14 i single-ended electrical output load, unless otherwise noted. see figure 1 for electrical setup.) (note 2) parameter symbol conditions min typ max units power supply power-supply current i cc excludes output current through the exter - nal pullup inductors (note 3) 51 62 ma power-supply voltage v cct , v cc 2.95 3.63 v power-on reset v cc for enable high 2.55 2.75 v v cc for enable low 2.3 2.45 v data input specification input data rate 1 10.3 11.3 gbps differential input voltage v in launch amplitude into fr4 transmission line p 12in, set_txeq[1:0] = 01b, set_txeq[1:0] = 11b 0.2 0.8 v p-p set_txeq[1:0] = 01b, set_txeq[1:0] = 11b, outside of optimized range 0.15 1.0 set_txeq[1:0] = 00b 0.15 1.0 common-mode input voltage v cm 2.15 v differential input resistance r in 75 100 125 i
????????????????????????????????????????????????????????????????? maxim integrated products 3 MAX3948 11.3gbps, low-power, dc-coupled laser driver electrical characteristics (continued) (v cc = v cct = 2.95v to 3.63v, t a = -40 n c to +95 n c; typical values are at v cc = v cct = 3.3v, t a = +25 n c, ld dc = 20ma, ld mod = 40ma, and 14 i single-ended electrical output load, unless otherwise noted. see figure 1 for electrical setup.) (note 2) parameter symbol conditions min typ max units differential input s-parameters (note 4) scd11 0.1ghz p f p 11.3ghz -40 db sdd11 f p 4.1ghz -19 4.1ghz p f p 11.3ghz -16 scc11 1ghz p f p 11.3ghz, z cm_source = 25 w -15 dc current generator (note 5, figure 3) maximum dc dac current i dcmax current into vout pin 50 61 ma minimum dc dac current i dcmin current into vout pin 2.5 ma dc-off current i dc-off 0.1 ma dc dac lsb size 116 f a dc dac integral nonlinearity inl 2.5ma p i dc p 50ma 0.5 %fs dc dac differential nonlinearity dnl guaranteed monotonic at 8-bit resolution, set_idc[8:1] 0.5 lsb dc current dac stability 2.5ma p i dc p 50ma, v vout = v cct - 1.5v (notes 6, 7) 1 4 % dc compliance voltage at vout v cct - 2 v cct - 1.5 v cct - 1 v bmon current gain g bmon g bmon = i bmon /i dc , external resistor to gnd defines voltage 15 16.7 20 ma/a bmon current gain stability 2.5ma p i dc p 50ma, v vout = v cct - 1.5v (notes 6, 7) 1.5 5 % compliance voltage at bmon 0 1.8 v laser modulator (note 8) maximum laser modulation current ld modmax current into toutc pin, 5 i laser load, 6.25% deemphasis 85 ma p-p minimum laser modulation current ld modmin current into toutc pin, 5 i laser load, 6.25% deemphasis 10 ma p-p modulation-off laser current ld mod- off current into toutc pin 0.1 ma modulation dac full-scale current i mod-fs 99.7 130 ma modulation dac lsb size 247 f a modulation dac integral nonlinearity inl 1 %fs modulation dac differential nonlinearity dnl guaranteed monotonic at 8-bit resolution, set_imod[8:1] 0.5 lsb touta and toutc instantaneous output compliance voltage v touta with external inductive pullup to v cct v cct - 1 v cct + 1 v v toutc with external inductive pullup to vout 0.6 v cct - 1
????????????????????????????????????????????????????????????????? maxim integrated products 4 MAX3948 11.3gbps, low-power, dc-coupled laser driver electrical characteristics (continued) (v cc = v cct = 2.95v to 3.63v, t a = -40 n c to +95 n c; typical values are at v cc = v cct = 3.3v, t a = +25 n c, ld dc = 20ma, ld mod = 40ma, and 14 i single-ended electrical output load, unless otherwise noted. see figure 1 for electrical setup.) (note 2) parameter symbol conditions min typ max units modulation output termination r out 19 25 31 i modulation current dac stability 10ma p ld mod p 85ma, v vout = v cct - 1.5v (notes 6, 7) 1.5 4 % modulation current rise/fall time t r, t f 20% to 80%, 10ma p ld mod p 85ma (note 6) 26 36 ps deterministic jitter (note 6) dj 10ma p ld mod p 85ma, 8.5gbps with k28.5 pattern 4 ps p-p 10ma p ld mod p 85ma, 10.3125gbps (note 9) 6 12 10ma p ld mod p 85ma, 11.3gbps (note 9) 8 13 random jitter rj 10ma p ld mod p 85ma (note 6) 0.19 0.55 ps rms differential s-parameters (note 4) scc22 0.1ghz p f p 4.1ghz, z cm_source = 12.5 w -10 db 4.1ghz < f p 11.3ghz, z cm_source = 12.5 w -6 sdd22 0.1ghz< f p 11.3ghz, z diff_source = 50 w -13 safety features threshold voltage at vout fault never occurs for v vout r v cct - 2v, fault always occurs for v vout < v cct - 2.8v, referenced to v cct v cct - 2.8 v cct - 2 v fault never occurs for v vout r 1.7v, fault always occurs for v vout < 1.35v, referenced to gnd, set_imod[8:6] = 111b 1.35 1.7 fault never occurs for v vout r 0.57v, fault always occurs for v vout < 0.43v, referenced to gnd, set_imod[8:6] = 000b 0.43 0.57 threshold voltage at toutc fault never occurs for v toutc r 0.48v, fault always occurs for v toutc < 0.35v 0.35 0.48 v threshold voltage at touta fault never occurs for v touta r v cct - 1.45v, fault always occurs for v touta < v cct - 1.88v v cct - 1.88 v cct - 1.45 v threshold voltage at v cct fault never occurs for v cct r v cc - 0.15v, fault always occurs for v cct < v cc - 0.4v v cc - 0.4 v cc - 0.15 v
????????????????????????????????????????????????????????????????? maxim integrated products 5 MAX3948 11.3gbps, low-power, dc-coupled laser driver electrical characteristics (continued) (v cc = v cct = 2.95v to 3.63v, t a = -40 n c to +95 n c; typical values are at v cc = v cct = 3.3v, t a = +25 n c, ld dc = 20ma, ld mod = 40ma, and 14 i single-ended electrical output load, unless otherwise noted. see figure 1 for electrical setup.) (note 2) parameter symbol conditions min typ max units timing requirements (notes 5, 6, 8) initialization time t init ld dc = 25ma, ld mod = 65ma, dc and modulation dac are both h0x00, time from tx_en = high to ld dc and ld mod at 90% of steady state 250 ns disable assert time t off time from rising edge of disable input signal to ld dc and ld mod at 10% of steady state (note 6) 25 75 ns disable negate time t on time from falling edge of disable to ld dc and ld mod at 90% of steady state (note 6) 250 600 ns fault reset time t recover time from negation of latched fault using disable to ld dc and ld mod at 90% of steady state 250 600 ns fault assert time t fault time from fault to fault = high, c fault 20pf, r fault = 4.7k w 0.7 3 f s disable to reset time time disable must be held high to reset fault 4 f s digital i/o specifications (sda, scl, csel, fault, disable) input high voltage v ih 1.8 v cc v input low voltage v il 0 0.8 v input hysteresis v hyst 80 mv input capacitance c in 5 pf disable input resistance r pull internal pullup resistor 4.7 7.5 10 k i input leakage current (disable) i ih input connected to v cc 10 f a i il input connected to gnd 440 775 input leakage current (sda) i ih input connected to v cc -2 +2 f a i il input connected to gnd; internal pullup is 75k w typical 35 75 input leakage current (scl, csel) i ih input connected to v cc ; internal pulldown is 75k w typical 35 75 f a i il input connected to gnd -2 +2 output high voltage (sda, fault) v oh external pullup is (4.7k i to 10k i ) to v cc v cc - 0.1 v output low voltage (sda, fault) v ol external pullup is (4.7k i to 10k i ) to v cc 0.4 v
????????????????????????????????????????????????????????????????? maxim integrated products 6 MAX3948 11.3gbps, low-power, dc-coupled laser driver note 2: specifications at t a = -40 n c and +95 n c are guaranteed by design and characterization. note 3: vout is connected to 1.9v. touta is connected to v cct through pullup inductors, and toutc is connected to vout through pullup inductors. note 4: measured with agilent 8720es + atn-u112a and series rc (39 i and 0.3pf) between toutc and touta ( figure 1 ). note 5: ld dc = i dc + i mod x (de + r x (1 - de)/(50 + r)/2), where ld dc is the effective laser dc current, i dc is the dc dac current, i mod is the modulation dac current, de is the deemphasis percentage, and r is the differential laser load resis - tance. example: for r = 5 i and de = 6.25%, ld dc = i dc + 0.105 x i mod . note 6: guaranteed by design and characterization. note 7: stability is defined as [(i measured ) - (i reference )]/(i reference ) over the listed current/temperature range and v cct = v cc = v ccref q 5%, v ccref = 3.3v. reference current measured at v ccref and t ref = +25 n c. note 8: ld mod = i mod x (1 - de) x 50/(50 + r), where ld mod is the effective laser modulation current, i mod is the modulation dac current, de is the deemphasis percentage, and r is the differential laser load resistance. example: for r i = 5 and de = 6.25%, ld mod = 0.852 x i mod . note 9: equivalent 2 23 - 1 prbs pattern = 2 7 - 1 prbs + 72 zeros + 2 7 - 1 prbs + 72 ones. note 10: these limits are based on simulated values. electrical characteristics (continued) (v cc = v cct = 2.95v to 3.63v, t a = -40 n c to +95 n c; typical values are at v cc = v cct = 3.3v, t a = +25 n c, ld dc = 20ma, ld mod = 40ma, and 14 i single-ended electrical output load, unless otherwise noted. see figure 1 for electrical setup.) (note 2) parameter symbol conditions min typ max units 3-wire digital interface timing characteristics (figure 5) scl clock frequency f scl 400 1000 khz scl pulse-width high t ch 500 ns scl pulse-width low t cl 500 ns sda setup time t ds 100 ns sda hold time t dh 100 ns scl rise to sda propagation time t d 5 ns csel pulse-width low t csw 500 ns csel leading time before the first scl edge t l 500 ns csel trailing time after the last scl edge t t 500 ns sda, scl load c b total bus capacitance on one line with 4.7k i pullup to v cc 20 pf vsel four-level digital input (note 10, table 2) input voltage high 3-wire address, addr[6:5] = 11b 5/6v cc + 0.2 v cc v input voltage mid-high 3-wire address, addr[6:5] = 10b 3/6v cc + 0.2 2/3 x v cc 5/6v cc - 0.2 v input voltage mid-low 3-wire address, addr[6:5] = 01b 1/6v cc + 0.2 1/3 x v cc 3/6v cc - 0.2 v input voltage low 3-wire address, addr[6:5] = 00b 0 1/6v cc - 0.2 v
????????????????????????????????????????????????????????????????? maxim integrated products 7 MAX3948 11.3gbps, low-power, dc-coupled laser driver figure 1. ac test setup 0.01f scl sda csel vout 0.01f tin+ toutc touta v cct tin- 4.7ki 0.01f v cc v cct ep disable fault bmon v cc v cc v cc v cct v out = v cct - 2v to v cct - 1v v out v cct v cc v cct v cc z 0 = 50i 4.7ki 2ki 0.01f z 0 = 50i 0.01f 0.01f 100nh 40i 40i 50i 25i 25i 50i 50i 0.1f sampling oscilloscope 0.1f 50i 50i 50i 50i 50i 50i 50i 100i 39i vsel 0.01f 0.1f 0.3pf MAX3948 100nh 2.2h 100i 2.2h
????????????????????????????????????????????????????????????????? maxim integrated products 8 MAX3948 11.3gbps, low-power, dc-coupled laser driver typical operating characteristics (typical values are at v cc = v cct = 3.3v, t a = +25c, data pattern = 2 7 - 1 prbs + 72 zeros + 2 7 - 1 prbs (inverted) + 72 ones, unless otherwise noted.) input differential to common-mode return loss vs. frequency MAX3948 toc05 frequency (mhz) scd11 (db) 10,000 1000 -50 -40 -30 -20 -10 0 -60 100 100,000 input common-mode return loss vs. frequency MAX3948 toc04 frequency (mhz) scc11 (db) 10,000 1000 -25 -20 -15 -10 -5 0 -30 100 100,000 input differential return loss vs. frequency MAX3948 toc03 frequency (mhz) sdd11 (db) 10,000 1000 -50 -40 -30 -20 -10 0 -60 100 100,000 supply current vs. temperature (ld mod = 40ma p-p , ld dc = 20ma) MAX3948 toc09 temperature (c) supply current (ma) 65 80 50 35 20 5 -10 -25 40 50 60 70 80 30 -40 95 current into v cc and v cct pins differential laser load = 5 random jitter vs. modulation current (at load) MAX3948 toc08 modulation current (ma p-p ) rj (ps rms ) 70 60 40 50 20 30 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 0 80 11.3gbps, 1111 0000 patter n output commmon-mode return loss vs. frequency MAX3948 toc07 frequency (mhz) scc22 (db) 10,000 1000 -30 -25 -20 -15 -10 -5 0 -35 100 100,000 output differential return loss vs. frequency MAX3948 toc06 frequency (mhz) sdd22 (db) 10,000 1000 -40 -35 -30 -25 -20 -15 -10 -5 0 -45 100 100,000 10.3gbps electrical eye diagram MAX3948 toc02 20ps/div 2 23 -1, prbs 10.3gbps optical eye diagram MAX3948 toc01
????????????????????????????????????????????????????????????????? maxim integrated products 9 MAX3948 11.3gbps, low-power, dc-coupled laser driver typical operating characteristics (continued) (typical values are at v cc = v cct = 3.3v, t a = +25c, data pattern = 2 7 - 1 prbs + 72 zeros + 2 7 - 1 prbs (inverted) + 72 ones, unless otherwise noted.) edge speed vs. modulation current MAX3948 toc15 i mod (ma) edge speed (ps) 80 60 20 40 15 20 25 30 40 35 45 50 10 0 100 10.3gbps, 1111 0000 pattern 20% to 80% fall time rise time dc monitor current vs. temperature MAX3948 toc14 temperature (c) bmon current (a) 95 80 50 65 -10 5 20 35 -25 100 200 300 400 500 600 700 800 900 1000 0 -40 i dc = 50ma i dc = 25ma i dc = 10ma modulation current deemphasis vs. manual deemphasis setting MAX3948 toc13 set_txde[6:0] deemphasis (%) 100 80 60 40 1 2 3 4 5 6 7 8 9 10 0 20 120 set_imod[8:0] = 230d txde_md[1:0] = 2d modulation current (at load) vs. dac setting MAX3948 toc12 set_imod[8:0] modulation current (ma p-p ) 500 400 300 200 100 10 20 30 40 50 60 70 80 90 100 0 0 600 25 differential load 10 differential load 5 differential load total current vs. temperature (ld mod at load = 40ma p-p , ld dc = 20ma) MAX3948 toc10 temperature (c) supply current (ma) 80 65 -25 -10 5 35 20 50 105 110 115 120 125 130 135 140 100 -40 95 current into v cc and v cct pins plus modulation, deemphasis, and dc dac current, differential laser load = 5 edge speed vs. deemphasis setting MAX3948 toc16 set_txde[6:0] edge speed (ps) 95 70 45 15 20 25 30 35 40 45 50 10 20 120 set_imod[8:0] = 230d 20% to 80% 10.3gbps, 1111 0000 pattern fall time rise time dc current vs. dac setting MAX3948 toc11 set_idc[8:0] i dc (ma) 500 400 300 200 100 10 20 30 40 50 60 70 0 0 600
???????????????????????????????????????????????????????????????? maxim integrated products 10 MAX3948 11.3gbps, low-power, dc-coupled laser driver typical operating characteristics (continued) (typical values are at v cc = v cct = 3.3v, t a = +25c, data pattern = 2 7 - 1 prbs + 72 zeros + 2 7 - 1 prbs (inverted) + 72 ones, unless otherwise noted.) fault recovery MAX3948 toc20 4s/div vout fault disable low low high output external fault removed response to fault MAX3948 toc19 1s/div vout fault disable low high external fault output transmitter enable MAX3948 toc18 200ns/div v cc fault disable high low low 3.3v t on = 400ns optical output transmitter disable MAX3948 toc17 80ns/div v cc fault disable low high 3.3v optical output MAX3948 3-wire address vs. vsel voltage (data from simulation) MAX3948 toc24 vsel voltage (fraction of v cc ) v cc /3 2v cc /3 v cc gnd addr[6:5] = 00 addr[6:5] = 01 addr[6:5] = 10 addr[6:5] = 11 indeterminate 5/6xv cc 200mv indeterminate 3/6xv cc 200mv indeterminate 1/6xv cc 200mv distribution of fall time (worst case conditions) MAX3948 toc23 fall time (ps) percent of units (%) 33.0 32.5 31.5 32.0 30.5 31.0 30.0 5 10 15 20 25 30 35 40 45 0 29.5 v cc = 2.95v t a = 95c 20% to 80% distribution of rise time (worst case conditions) MAX3948 toc22 rise time (ps) percent of units (%) 33.0 32.5 31.5 32.0 30.5 31.0 30.0 5 10 15 20 25 30 35 40 45 0 29.5 v cc = 2.95v t a = 95c 20% to 80% frequent assertion of disable MAX3948 toc21 4s/div vout fault disable low low output external fault high high
???????????????????????????????????????????????????????????????? maxim integrated products 11 MAX3948 11.3gbps, low-power, dc-coupled laser driver pin configuration pin description pin name function equivalent circuit 1 disable disable input, cmos. set to logic-low for normal operation. logic-high or open disables both the modulation current and the dc current. internally pulled up by a 7.5k i resistor to v cc . 2 vsel 4-level input for spi device address detection. connecting to v cc sets addr[6:5] to 11b, connecting to v cc x 2/3 sets addr[6:5] to 10b, connecting to v cc /3 sets addr[6:5] to 01b, and connecting to gnd sets addr[6:5] to 00b. 15 16 14 13 5 6 7 fault bmon 8 disable csel vout scl 1 3 tin+ 4 12 10 9 tin- *ep *exposed pad must be connected to ground. v cc v cct toutc touta v cct vsel sda 2 11 v cc tqfn (3mm x 3mm) top view + MAX3948 v sel v cc 7.5ki v cc v cc esd protection v cc disable
???????????????????????????????????????????????????????????????? maxim integrated products 12 MAX3948 11.3gbps, low-power, dc-coupled laser driver pin description (continued) pin name function equivalent circuit 3 fault fault output, open drain. logic-high indicates a fault con - dition has been detected. it remains high even after the fault condition has been removed. a logic-low occurs when the fault condition has been removed and the fault latch has been cleared by toggling disable. fault should be pulled up to v cc by a 4.7k i to 10k i resistor. 4 bmon analog laser dc current monitor output. current out of this pin develops a ground-referenced voltage across an external resistor that is proportional to the vout pin cur - rent. the current sourced by this pin is typically 1/60 the vout pin current. 5,8 v cct power supply. provides supply voltage to the output block. 6 touta inverting laser diode modulation current output. connect this pin to the anode of the laser diode. 7 toutc noninverting laser diode modulation current output. connect this pin to the cathode of the laser diode. fault clamp bmon r v cct v cct touta toutc
???????????????????????????????????????????????????????????????? maxim integrated products 13 MAX3948 11.3gbps, low-power, dc-coupled laser driver pin description (continued) pin name function equivalent circuit 9 vout combined current return path and laser dc current output 10 csel chip-select cmos input. setting csel to logic-high starts a 3-wire command cycle. setting csel to logic-low ends the cycle and resets the control state machine. internally pulled down to gnd by a 75k i resistor. 11 sda serial data bidirectional cmos input. also an open-drain output. this pin has a 75k i internal pullup, but requires an external 4.7k i to 10k i pullup resistor to v cc for proper operation. 12 scl serial-clock cmos input. this pin has an internal 75k i pulldown resistor to gnd. vout v cct 75ki v cc v cc esd protection csel 75ki v cc v cc esd protection v cc sda 75ki v cc v cc esd protection scl
???????????????????????????????????????????????????????????????? maxim integrated products 14 MAX3948 11.3gbps, low-power, dc-coupled laser driver pin description (continued) pin name function equivalent circuit 13, 16 v cc power supply. provides supply voltage to core analog and digital circuitry. 14 tin+ noninverting data input. input with internal 50 i termination. 15 tin- inverting data input. input with internal 50 i termination. ep exposed pad (ground). this is the only electrical connec - tion to ground on the MAX3948 and must be soldered to the circuit board ground for proper thermal and electrical perfor - mance (see the exposed-pad package section). 50i 50i v cc gnd tin+ tin- control loop
???????????????????????????????????????????????????????????????? maxim integrated products 15 MAX3948 11.3gbps, low-power, dc-coupled laser driver figure 2. functional diagram eye safety and output control touta toutc vout bmon tx_en tx_pol 50i 50i fault tin+ tin- sda scl csel disable power-on reset v cc v cct v out 7.5ki v cc v cm 75ki 1 0 25i 25i eq tx_los i mod_dac + i de_dac i dc v cc i dc /60 vsel 3-wire interface register control logic channel detection 2b set_txeq 9b dac set_imod 75ki 75ki 7b dac set_txde 9b dac set_idc MAX3948
???????????????????????????????????????????????????????????????? maxim integrated products 16 MAX3948 11.3gbps, low-power, dc-coupled laser driver detailed description the MAX3948 sfp+/qsfp+ laser driver is designed to drive 5 i to 10 i tosas from 1gbps to 11.3gbps. it contains an input buffer with programmable equalization, dc and modulation current dacs, an output driver with adjustable deemphasis, power-on-reset circuitry, dc current monitor, programmable 3-wire address, and eye safety circuitry with maskable fault monitors. a 3-wire digital interface is used to control these functions. input buffer with programmable equalization the input is internally biased and terminated with 50 i to a common-mode voltage. the first amplifier stage fea - tures a programmable equalizer for high-frequency loss - es including a sfp+/qsfp+ host connector. equalization is controlled by the set_txeq register ( table 1 ). the tx_pol bit in the txctrl register controls the polarity of touta and toutc vs. tin+ and tin-. a status indica - tor bit ( txstat1 bit 5) monitors the presence of an ac input signal. dc current dac the dc current from the device is optimized to pro - vide up to 61ma of dc current into a laser diode with 116 f a resolution ( figure 3 ). the dc dac current is controlled through the 3-wire digital interface using the set_idc [8:0], idcmax [7:0], and dcinc [4:0] bits. for laser operation, the laser dc current can be set using the 9-bit set_idc dac register. the upper 8 bits are set by the set_idc [8:1] register, commonly used during the initialization procedure after power-on reset (por). the lsb (bit 0) of set_idc ( dcinc [7]) is initialized to zero after por and can be updated using the dcinc register. figure 3. ac-/dc-coupling cases table 1. input equalization control register settings set?txeq[1:0] boost at 5.16ghz (db) 0 0 1 0 1 3 1 1 5.5 ac-coupling case v cct touta 3.3v 3.3v toutc vout i mod_dac i bias_dac ld mod ld mod ld bias ld mod = k 1 i mod_dac ld bias = i bias_dac note: figures are simplified to express ac-coupling vs. dc-coupling differences. *see the electrical characteristics table, notes 5 and 8. ld mod = k 1 i mod_dac ld bias * = i dc_dac + k 1 /2 i mod_dac + f(i mod_dac ,de,r) ld bias ld dc i dc_dac v cct touta toutc vout i mod_dac dc-coupling case
???????????????????????????????????????????????????????????????? maxim integrated products 17 MAX3948 11.3gbps, low-power, dc-coupled laser driver the idcmax register limits the maximum set_idc [8:1] dac code. after initialization the value of the set_idc dac register should be updated using the dcinc register to optimize cycle time and enhance laser safety. the dcinc regis - ter is an 8-bit register. the first 5 bits of dcinc contain the increment information in twos complement format. increment values range from -16 to +15 lsbs. if the updated value of set_idc [8:1] exceeds idcmax [7:0], the idcerr warning flag is set and set_idc [8:1] is set to idcmax [7:0]. modulation current dac the modulation current from the MAX3948 is optimized to provide up to 85ma of modulation current into a 5 i laser load with 210 f a resolution. the modulation current is controlled through the 3-wire digital interface using the set_imod [8:1], imodmax [7:0], modinc [7:0], and set_txde registers. for laser operation, the laser modulation current can be set using the 9-bit set_imod dac. the upper 8 bits are programmed through the set_imod [8:1] register, com - monly used during the initialization procedure after por. the lsb (bit 0) of set_imod ( modinc [7])is initialized to zero after por and can be updated using the modinc register. the imodmax register limits the maximum set_imod [8:1] dac code. after initialization the value of the set_imod dac reg - ister should be updated using the modinc [4:0] bits to optimize cycle time and enhance laser safety. the modinc register is an 8-bit register. the first 5 bits of modinc contain the increment information in twos com - plement format. increment values range from -16 to +15 lsbs. if the updated value of set_imod [8:1] exceeds imodmax [7:0], the imoderr warning flag is set and set_imod [8:1] is set to imodmax [7:0]. effective modulation current seen by the laser is actu - ally the combination of the dac current generated by the set_imod [8:0] register (i mod ), deemphasis setting (de), and differential laser load (r). it is calculated by the following formula: ld mod = i mod x 50 x (1 - de)/(50 + r) output driver this device is optimized to drive a differential tosa with a 25 i flex circuit. the unique design of the output stage enables dc-coupling to unmatched tosas with laser diode impedances ranging from 5 i to 10 i . the output stage also features programmable deemphasis that can be set as a percentage of the modulation current. the deemphasis function is controlled by the txctrl [4:3] and the set_txde registers. power-on reset (por) power-on reset ensures that the laser is off until the supply voltage has reached a specified threshold (2.75v). after power-on reset, tx_en is 0 and dc current and modula - tion current dacs default to small codes. in the case of a por, all registers are reset to their default values. bmon function the current out of the bmon pin is typically 1/60th the value of the current into the vout pin. the total resis - tance to ground at bmon sets the voltage. vsel function the vsel pin is an analog input that sets the 3-wire address for the MAX3948. the pin can be set to either v cc , v cc x 2/3, v cc /3, or to gnd ( table 2 ). this allows up to four MAX3948s to be operated on a single 3-wire bus, each with their own address. eye safety and output control circuitry the safety and output control circuitry includes the dis - able pin (disable) and enable bit (tx_en), along with a fault indicator and fault detectors ( figure 4 ). a fault condition triggers the fault pin to go high and a corre - sponding bit is set in the txstat1 register. the MAX3948 has two types of faults: hard faults and soft faults. hard faults are maskable, trigger the fault pin (transitions high), disable the outputs and are stored in the txstat1 register. soft faults serve as warnings, do not disable the outputs, and are stored in the txstat2 register. table 2. 3-wire address selection vsel addr[6:5] v cc 11b v cc x 2/3 10b v cc /3 01b gnd 00b
???????????????????????????????????????????????????????????????? maxim integrated products 18 MAX3948 11.3gbps, low-power, dc-coupled laser driver figure 4. eye safety circuitry <0> <1> v cct - 2.4v (for vout) v cc - 0.3v (for v cct ) i mod i dc <2> 0.41v <3> <4> <6> <7> 0.48v + 0.14 x set_imod[8:6]d (self-adjusting) <5> v cct - 1.6 v unused fault register txstat1 addr = h0x06 <1> <0> unused unused overflow underflow set_idc[8:1] idcmax[7:0] set_imod[8:1] imodmax[7:0] los circuit overflow underflow <2> <3> warning register txstat2 addr = h0x07 v cct touta v cc disable 7.5ki reset por 25 toutc vout 25 MAX3948
???????????????????????????????????????????????????????????????? maxim integrated products 19 MAX3948 11.3gbps, low-power, dc-coupled laser driver the fault pin is a latched output that can be cleared by toggling the disable pin. toggling the disable pin also clears the txstat1 and txstat2 registers. a single-point failure can be a short to v cc or gnd. table 3 shows the circuit response to various single-point failures. table 3. circuit response to single-point failure note 1: normal operationdoes not affect the laser power. note 2: pin functionality might be affected, which could affect laser power/performance. note 3: supply-shorted current is assumed to be primarily on the circuit board (outside this device) and the main supply is col - lapsed by the short. note 4: normal in functionality, but performance could be affected. warning: shorted to v cc or shorted to ground on some pins can violate the absolute maximum ratings . pin name short to v cc short to gnd open 1 disable disabled normal (note 1). can only be disabled by other means. disabled 2 vsel normal (note 2) normal (note 2) normal (note 2) 3 fault normal (note 2) normal (note 1) normal (note 2) 4 bmon normal (note 2) normal (note 2) normal (note 2) 5, 8 v cct normal disabledfault (external supply shorted) (note 3) redundant path (note 4) 6 touta laser modulation current is reduced disabled (hard fault) laser modulation current is reduced or disabled (hard fault) 7 toutc laser modulation current is reduced or off disabled (hard fault) laser modulation current is reduced or disabled (hard fault) 9 vout idc is on, but not delivered to the laser; no fault disabled (hard fault) disabled (hard fault) 10 csel normal (note 2) normal (note 2) normal (note 2) 11 sda normal (note 2) normal (note 2) normal (note 2) 12 scl normal (note 2) normal (note 2) normal (note 2) 13, 16 v cc normal disabledhard fault (external supply shorted) (note 3) redundant path (note 4) 14 tin+ disabled (hard fault) disabled (hard fault) normal (note 2) or disabled (hard fault) 15 tin- disabled (hard fault) disabled (hard fault) normal (note 2) or disabled (hard fault)
???????????????????????????????????????????????????????????????? maxim integrated products 20 MAX3948 11.3gbps, low-power, dc-coupled laser driver 3-wire interface the MAX3948 implements a proprietary 3-wire digital interface. an external controller generates the clock. the 3-wire interface consists of an sda bidirectional data line, a scl clock signal input, and a csel chip-select input (active high). the external master initiates a data transfer by asserting the csel pin. the master starts to generate a clock signal after the csel pin has been set to a logic-high. all data transfers are most significant bit (msb) first. protocol each operation consists of 16-bit transfers (15-bit address/data, 1-bit rwn). the bus master generates 16 clock cycles to scl. all operations transfer 8 bits to the MAX3948. the rwn bit determines if the cycle is read or write ( table 5 ). register addresses the MAX3948 contains 13 registers available for pro - gramming. table 6 shows the registers and addresses. write mode (rwn = 0) the master generates 16 clock cycles at scl in total. the master outputs a total of 16 bits (msb first) to the sda line at the falling edge of the clock. the master closes the transmission by setting csel to 0. figure 5 shows the interface timing. read mode (rwn = 1) the master generates 16 clock cycles at scl in total. the master outputs a total of 8 bits (msb first) to the sda line at the falling edge of the clock. the sda line is released after the rwn bit has been transmitted. the slave out - puts 8 bits of data (msb first) at the rising edge of the clock. the master closes the transmission by setting csel to 0. figure 5 shows the interface timing. mode control normal mode allows read-only instruction for all registers. only the modinc and dcinc registers can be updated during normal mode. doing so speeds up the laser con - trol update through the 3-wire interface by a factor of two. the normal mode is the default mode. setup mode allows the master to write unrestricted data into any register except the status ( txstat1 , txstat2 ) registers. to enter the setup mode, the modectrl register (address = h0x0f) must be set to 12h. after the modectrl register has been set to 12h, the next oper - ation is unrestricted. the setup mode is automatically exited after the operation is finished. this sequence must be repeated if further unrestricted settings are necessary. broadcast mode allows for faster configuration of mul - tiple MAX3948 ics by causing the address selection bits (addr[6:5]) to be ignored so all MAX3948s on the bus can be written to simultaneously. a block write in broadcast mode can start at any of the addresses in table 4 . the block write is achieved by holding the csel pin high to lengthen the spi cycle. the register address increments automatically through the sequence listed in table 4 and wraps from txctrl to fmsk . the block write ends once the csel pin is asserted low. table 5. digital communication word structure table 4. broadcast mode register initialization sequence address name h0x0f fmsk h0x10 set_txde h0x11 set_txeq h0x0a imodmax h0x0b idcmax h0x08 set_idc h0x09 set_imod h0x05 txctrl bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 addr[6:0] rwn data[7:0]
???????????????????????????????????????????????????????????????? maxim integrated products 21 MAX3948 11.3gbps, low-power, dc-coupled laser driver table 6. register descriptions and addresses figure 5. timing for 3-wire digital interface address name function h0x05 txctrl transmitter control register h0x06 txstat1 transmitter status register 1 h0x07 txstat2 transmitter status register 2 h0x08 set_idc dc current setting register h0x09 set_imod modulation current setting register h0x0a imodmax maximum modulation current setting register h0x0b idcmax maximum dc current setting register h0x0c modinc modulation current increment setting register h0x0d dcinc dc current increment setting register h0x0e modectrl mode control register h0x0f fmsk fault mask register h0x10 set_txde transmitter deemphasis control register h0x11 set_txeq transmitter equalization control register csel scl sda csel scl sda 1 2 3 4 5 6 7 8 a6 9 1 0 1 1 1 2 1 3 1 4 1 5 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 0 a5 a4 a3 a2 a1 rwn d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 rwn write mode read mode a0 a6 a5 a4 a3 a2 a1 a0 t l t l t ch t cl t ds t dh m t ch t cl t ds t d t dh t t t t m s
???????????????????????????????????????????????????????????????? maxim integrated products 22 MAX3948 11.3gbps, low-power, dc-coupled laser driver register descriptions transmitter control register (txctrl), address: h0x05 bit d7 d6 d5 d4 d3 d2 d1 d0 bit name reserved reserved reserved txde_md[1] txde_md[0] softres tx_pol tx_en read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 1 0 the txctrl register sets the devices operation. bit name description d[7:5] reserved reserved bits. the default state for these bits is 0 and they must be kept 0 when the register is accessed for a write operation. d[4:3] txde_md controls the mode of the transmit output deemphasis circuitry. 00 = deemphasis is fixed at 6% of the modulation amplitude 01 = deemphasis is fixed at 3% of the modulation amplitude 10 = deemphasis is programmed by set_txde register setting (3% to 9%) 11 = deemphasis is at its maximum of ~9% d2 softres resets all registers to their default values (txctrl[1:0] must be = 10b during the write to softres for the registers to be set to their default values). 0 = normal operation 1 = reset d1 tx_pol controls the polarity of the transmit signal path. 0 = inverse 1 = normal operation d0 tx_en enables or disables the transmit circuitry. 0 = disabled 1 = enabled
???????????????????????????????????????????????????????????????? maxim integrated products 23 MAX3948 11.3gbps, low-power, dc-coupled laser driver transmitter status register 1 (txstat1), address: h0x06 transmitter status register 2 (txstat2), address: h0x07 bit d7 (sticky) d6 (sticky) d5 (sticky) d4 (sticky) d3 (sticky) d2 (sticky) d1 (sticky) d0 (sticky) bit name fst[7] fst[6] fst[5] fst[4] fst[3] fst[2] fst[1] fst[0] read/write r r r r r r r r por state 1 x x x x x x x reset upon read yes yes yes yes yes yes yes yes the txstat1 register is a device status register. bit name description d7 fst[7] when the v cc supply voltage is below 2.3v, the por circuitry reports a fault and commu - nication to the spi cannot be performed . once the v cc supply voltage is above 2.75v, the por resets all registers to their default values and the fault latch is cleared. d6 fst[6] reserved. d5 fst[5] indicates low or no ac signal at the inputs, a hard fault is reported unless masked. d4 fst[4] indicates vout too low condition. intended to be used as a warning/soft fault rather than a hard fault. in normal operation, fmsk[4] should be kept at logic 1 to convert this to a soft fault behavior. self-adjustable threshold = 0.48v + 0.14v x set_imod[8:6] (decimal value 0 to 7). a logic 1 can indicate marginal power-supply headroom. d3 fst[3] indicates touta open or shorted to gnd condition, threshold = v cct - 1.6v, a hard fault is reported unless masked. d2 fst[2] indicates toutc open or shorted to gnd condition, threshold = 0.41v, a hard fault is reported unless masked. d1 fst[1] indicates vout or v cct open or shorted to gnd conditions, threshold (v cct ) = v cc - 0.3v, threshold (vout) = v cct - 2.4v, a hard fault is reported unless masked. d0 fst[0] copy of a fault signal. bit d7 d6 d5 d4 d3 (sticky) d2 (sticky) d1 d0 bit name x x x x imoderr idcerr x x read/write x x x x r r x x por state x x x x 0 0 x x reset upon read x x x x yes yes x x the txstat2 register is a device status register. bit name description d3 imoderr modulation current overflow (on increment) or underflow ( on decrement) error. overflow occurs if result > imodmax. in overflow condition, set_imod[8:1] = imodmax[7:0]. underflow occurs if result < 0. in underflow condition, set_imod[8:0] = 0. d2 idcerr dc current overflow (on increment) or underflow (on decrement) error. overflow occurs if result > idcmax. in overflow condition, set_idc[8:1] = idcmax[7:0]. underflow occurs if result < 0. in underflow condition, set_idc[8:0] = 0.
???????????????????????????????????????????????????????????????? maxim integrated products 24 MAX3948 11.3gbps, low-power, dc-coupled laser driver dc current setting register (set_idc), address: h0x08 modulation current setting register (set_imod), address: h0x09 bit d7 d6 d5 d4 d3 d2 d1 d0 bit name set_idc[8] set_idc[7] set_idc[6] set_idc[5] set_idc[4] set_idc[3] set_idc[2] set_idc[1] read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 1 the set_idc register sets the laser dc current dac. bit name description d[7:0] set_idc[8:1] the dc current dac is controlled by a total of 9 bits. the set_idc[8:1] bits are used to set the dc current with even denominations from 0 to 510 bits. the lsb (set_idc[0]) bit is controlled by the dcinc register and is used to set the odd denominations in the set_idc[8:0]. any direct write to set_idc[8:1] resets the lsb. bit d7 d6 d5 d4 d3 d2 d1 d0 bit name set_imod[8] set_imod[7] set_imod[6] set_imod[5] set_imod[4] set_imod[3] set_imod[2] set_imod[1] read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 1 0 0 the set_imod register sets the laser modulation current dac. bit name description d[7:0] set_imod[8:1] the mod current dac is controlled by a total of 9 bits. the set_imod[8:1] bits are used to set the modulation current with even denominations from 0 to 510 bits. the lsb (set_imod[0]) bit is controlled by the modinc register and is used to set the odd denominations in the set_imod[8:0]. any direct write to set_imod[8:1] resets the lsb.
???????????????????????????????????????????????????????????????? maxim integrated products 25 MAX3948 11.3gbps, low-power, dc-coupled laser driver maximum modulation current setting register (imodmax), address: h0x0a maximum dc current setting register (idcmax), address: h0x0b modulation current increment setting register (modinc), address: h0x0c bit d7 d6 d5 d4 d3 d2 d1 d0 bit name imodmax[7] imodmax[6] imodmax[5] imodmax[4] imodmax[3] imodmax[2] imodmax[1] imodmax[0] read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 1 0 0 0 0 0 the imodmax register sets the upper limit of modulation current. bit name description d[7:0] imodmax[7:0] the imodmax register is an 8-bit register that can be used to limit the maximum modu - lation current. imodmax[7:0] is continuously compared to set_imod[8:1]. bit d7 d6 d5 d4 d3 d2 d1 d0 bit name idcmax[7] idcmax[6] idcmax[5] idcmax[4] idcmax[3] idcmax[2] idcmax[1] idcmax[0] read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 1 0 0 0 0 0 the idcmax register sets the upper limit of dc current. bit name description d[7:0] idcmax[7:0] the idcmax register is an 8-bit register that can be used to limit the maximum dc cur - rent. idcmax[7:0] is continuously compared to set_idc[8:1]. bit d7 d6 d5 d4 d3 d2 d1 d0 bit name set_imod[0] x x modinc[4] modinc[3] modinc[2] modinc[1] modinc[0] read/write r x x r/w r/w r/w r/w r/w por state 0 x x 0 0 0 0 0 the modinc register increments/decrements the set_imod register. bit name description d7 set_imod[0] lsb of set_imod register d[4:0] modinc this string of bits is used to increment or decrement the modulation current. when written to, the set_imod[8:0] bits are updated. modinc[4:0] are a twos complement string.
???????????????????????????????????????????????????????????????? maxim integrated products 26 MAX3948 11.3gbps, low-power, dc-coupled laser driver dc current increment setting register (dcinc), address: h0x0d mode control register (modectrl), address: h0x0e bit d7 d6 d5 d4 d3 d2 d1 d0 bit name set_idc[0] x x dcinc[4] dcinc[3] dcinc[2] dcinc[1] dcinc[0] read/write r x x r/w r/w r/w r/w r/w por state 0 x x 0 0 0 0 0 the dcinc register increments/decrements the set_idc register. bit name description d7 set_idc[0] lsb of set_idc register. d[4:0] dcinc this string of bits is used to increment or decrement the modulation current. when written to, the set_idc[8:0] bits are updated. dcinc[4:0] are a twos complement string. bit d7 d6 d5 d4 d3 d2 d1 d0 bit name modectrl[7] modectrl[6] modectrl[5] modectrl[4] modectrl[3] modectrl[2] modectrl[1] modectrl[0] read/write r/w r/w r/w r/w r/w r/w r/w r/w por state 0 0 0 0 0 0 0 0 reset upon read yes* yes* yes* yes* yes* yes* yes* yes* * all three modes reset back to 0h on the next 3-wire access. the modectrl register set the operational mode of the 3-wire control for the MAX3948. bit name description d[7:0] modectrl[7:0] the modectrl register enables the user to switch between normal and setup modes. the setup mode is achieved by setting this register to 12h. modectrl must be updat - ed before each write operation. exceptions are modinc and dcinc, which can be updated in normal mode. 00h: normal mode 12h: setup mode c9h: broadcast mode
???????????????????????????????????????????????????????????????? maxim integrated products 27 MAX3948 11.3gbps, low-power, dc-coupled laser driver fault mask register (fmsk), address: h0x0f bit d7 d6 d5 d4 d3 d2 d1 d0 bit name x reserved fmsk[5] fmsk[4] fmsk[3] fmsk[2] fmsk[1] fmsk[0] read/write x r/w r/w r/w r/w r/w r/w r/w por state x 1 1 0 0 0 0 0 reset upon read x no no no no no no no the fmsk register sets masking for the fault circuitry. bit name description d6 reserved reserved. this bit must be kept at logic 1 for all operations. d5 fmsk[5] input los fault condition mask. 0 = no mask 1 = mask d4 fmsk[4] vout too low fault condition mask. this condition is intended to behave like a warn - ing/soft fault in normal operation. in normal operation, fmsk[4] should be kept at logic 1. 0 = no mask 1 = mask d3 fmsk[3] touta open or shorted to gnd fault condition mask. 0 = no mask 1 = mask d2 fmsk[2] toutc open or shorted to gnd fault condition mask. 0 = no mask 1 = mask d1 fmsk[1] vout or v cct open or shorted to gnd fault conditions mask. 0 = no mask 1 = mask d0 fmsk[0] masks the fault latch signal, which controls the output stage on/off behavior. 0 = no mask 1 = mask when fmsk[0] = 1, output stage behavior becomes independent of fault conditions and is only controlled by disable pin and tx_en bit. masking this bit has no impact on normal reporting of fault status bits and assertion of the fault pin.
???????????????????????????????????????????????????????????????? maxim integrated products 28 MAX3948 11.3gbps, low-power, dc-coupled laser driver transmitter deemphasis control register (set_txde), address: h0x10 transmitter equalization control register (set_txeq), address: h0x11 bit d7 d6 d5 d4 d3 d2 d1 d0 bit name x set_txde[6] set_txde[5] set_txde[4] set_txde[3] set_txde[2] set_txde[1] set_txde[0] read/write x r/w r/w r/w r/w r/w r/w r/w por state x 0 0 0 0 0 1 0 the set_txde register sets the deemphasis amount for the transmitter when txde_md[1:0] is 10b. bit name description d[6:0] set_txde[6:0] this is a 7-bit register used to control the amount of deemphasis on the transmitter out - put. when calculating the total modulation current, the amount of deemphasis must be taken into account. deemphasis is set as a percentage of modulation current. bit d7 d6 d5 d4 d3 d2 d1 d0 bit name x x x x x x set_txeq[1] set_txeq[0] read/write x x x x x x r/w r/w por state x x x x x x 0 0 the set_txeq register sets the equalization amount for the transmitter input. bit name description d[1:0] set_txeq this is a 2-bit register used to control the amount of equalization on the transmitter input. see table 1 for more information.
???????????????????????????????????????????????????????????????? maxim integrated products 29 MAX3948 11.3gbps, low-power, dc-coupled laser driver design procedure programming modulation current 1) imodmax [7:0] = maximum_modulation_current_ value 2) set_imod n [8:0] = present_modulation_current_ value note: set_imod [8:1] are the bits that can be manu - ally written. set_imod [0] can only be updated using the modinc register. when implementing modulation current temperature compensation, it is recommended to use the modinc register, which guarantees the fastest modulation cur - rent update. 3) modinc n [4:0] = new_increment_value the device performs the following operation when modinc n [4:0] is written to: if (set_imod n [8:1] p imodmax[7:0]), then (set_imod n [8:0] = set_imod n - 1 [8:0] + modinc n [4:0]) else (set_imod n [8:1] = imodmax[7:0]) the modulation dac current can be calculated using the following equation: imod dac current = i mod = (16 + set_imod[8:0]) x 247 f a the net modulation current (p-p) seen at the laser when driven differentially is calculated using the fol - lowing equation: ld mod = i mod x (1 - de) x 50/(50 + r) where r is the differential load impedance of the laser plus any added series resistance, and de is the deemphasis factor controlled by the tx_demd[1:0] bits. 4) txctrl [4:3] = 00, de = 0.0625 (~ 6% deemphasis case). in this mode, the device calculates and sets set_txde[6:0] = set_imod[8:2]. set_txde is not accessible for external write. 5) txctrl [4:3] = 00, de = 0.03125 (~ 3% deemphasis case). in this mode, the device calculates and sets set_txde [6:0] = set_imod[8:3]. set_txde is not accessible for external write. 6) txctrl [4:3] = 00, set_txde can be externally set to any value r set_imod [8:3]: i de = (2 + set_txde[6:0]) x 61.8 f a in this case de = i de /i mod . the value of the de factor starts close to 0.03 and can go up to 0.09 as the value of set_txde [6:0] is increased. once the de ratio is close to 0.09, the i de saturates and a further increase in set_txde [6:0] value does not change i de much. 7) txctrl [4:3] = 11, de = 0.09 (~ 9% deemphasis case). in this mode, the device calculates and sets the set_txde [6:0] = 127. set_txde is not acces - sible for external write. programming dc current 1) idcmax [7:0] = maximum_dc_current_value 2) set_idc n [8:0] = present_ dc _current_value note: set_idc [8:1] are the bits that can be manually written. set_idc [0] can only be updated using the dcinc register. when implementing laser bias current temperature compensation, it is recommended to use the dcinc register, which guarantees the fastest modulation cur - rent update. 3) dcinc n [4:0] = new_increment_value the device performs the following operation when dcinc n [4:0] is written to: if (set_idc n [8:1] p idcmax[7:0]), then (set_idc n [8:0] = set_idc n - 1 [8:0] + dcinc n [4:0]) else (set_idc n [8:1] = idcmax[7:0]) the dc dac current can be calculated using the fol - lowing equation: dc dac current = i dc = (16 + set_idc[8:0]) x 116 f a the net dc current seen at the laser when driven dif - ferentially is calculated using the following equation: ld dc = i dc + i mod x (de + r x (1 - de)/(50 + r)/2) where r is the differential load impedance of the laser plus any added series resistance, de is the deempha - sis factor controlled by the tx_demd[1:0] bits, and i mod is the modulation dac current.
???????????????????????????????????????????????????????????????? maxim integrated products 30 MAX3948 11.3gbps, low-power, dc-coupled laser driver applications information laser safety and iec 825 using the MAX3948 laser driver alone does not ensure that a transmitter design is compliant with iec 825. the entire transmitter circuit and component selections must be considered. each user must determine the level of fault tolerance required by the application, recognizing that maxim products are neither designed nor authorized for use as components in systems intended for surgical implant into the body, for applications intended to sup - port or sustain life, or for any other application in which the failure of a maxim product could create a situation where personal injury or death could occur. table 7. register summary register function/ address register name normal mode setup mode bit number/ type bit name default value notes transmitter control register address = h0x05 txctrl r r/w 7 reserved 0 must be kept at 0 r r/w 6 reserved 0 must be kept at 0 r r/w 5 reserved 0 must be kept at 0 r r/w 4 txde_md[1] 0 tx deemphasis control r r/w 3 txde_md[0] 0 tx deemphasis control r r/w 2 softres 0 global digital reset r r/w 1 tx_pol 1 tx polarity 0: inverse, 1: normal r r/w 0 tx_en 0 tx control 0: disable, 1: enable transmitter status register 1 address = h0x06 txstat1 r r 7 (sticky) fst[7] 1 por v cc low-limit violation r r 6 (sticky) fst[6] x reserved r r 5 (sticky) fst[5] x low or no ac signal at input r r 4 (sticky) fst[4] x vout too low r r 3 (sticky) fst[3] x touta open or shorted to gnd r r 2 (sticky) fst[2] x toutc open or shorted to gnd r r 1 (sticky) fst[1] x vout/v cct open or shorted to gnd r r 0 (sticky) fst[0] x copy of fault signal
???????????????????????????????????????????????????????????????? maxim integrated products 31 MAX3948 11.3gbps, low-power, dc-coupled laser driver table 7. register summary (continued) register function/ address register name normal mode setup mode bit number/ type bit name default value notes transmitter status register 2 address = h0x07 txstat2 r r 3 (sticky) imoderr 0 modulation current overflow (on increment) or under - flow (on decrement) error. overflow occurs if result > imodmax. underflow occurs if result < 0. r r 2 (sticky) idcerr 0 dc current overflow (on increment) or underflow (on decrement) error. overflow occurs if result > idcmax. underflow occurs if result < 0. dc current setting register address = h0x08 set_idc r r/w 7 set_idc[8] 0 msb dc dac r r/w 6 set_idc[7] 0 r r/w 5 set_idc[6] 0 r r/w 4 set_idc[5] 0 r r/w 3 set_idc[4] 0 r r/w 2 set_idc[3] 0 r r/w 1 set_idc[2] 0 r r/w 0 set_idc[1] 1 modulation current setting register address = h0x09 set_imod r r/w 7 set_imod[8] 0 msb modulation dac r r/w 6 set_imod[7] 0 r r/w 5 set_imod[6] 0 r r/w 4 set_imod[5] 0 r r/w 3 set_imod[4] 0 r r/w 2 set_imod[3] 1 r r/w 1 set_imod[2] 0 r r/w 0 set_imod[1] 0 maximum modulation current setting register address = h0x0a imodmax r r/w 7 imodmax[7] 0 msb modulation limit r r/w 6 imodmax[6] 0 r r/w 5 imodmax[5] 1 r r/w 4 imodmax[4] 0 r r/w 3 imodmax[3] 0 r r/w 2 imodmax[2] 0 r r/w 1 imodmax[1] 0 r r/w 0 imodmax[0] 0 lsb modulation limit
???????????????????????????????????????????????????????????????? maxim integrated products 32 MAX3948 11.3gbps, low-power, dc-coupled laser driver table 7. register summary (continued) register function/ address register name normal mode setup mode bit number/ type bit name default value notes maximum dc dac current setting register address = h0x0b idcmax r r/w 7 idcmax[7] 0 msb dc dac limit r r/w 6 idcmax[6] 0 r r/w 5 idcmax[5] 1 r r/w 4 idcmax[4] 0 r r/w 3 idcmax[3] 0 r r/w 2 idcmax[2] 0 r r/w 1 idcmax[1] 0 r r/w 0 idcmax[0] 0 lsb dc dac limit modulation current increment setting register address = h0x0c modinc r r 7 set_imod[0] 0 lsb of set_imod dac register address = h0x09 r/w r/w 4 modinc[4] 0 msb mod dac twos complement r/w r/w 3 modinc[3] 0 r/w r/w 2 modinc[2] 0 r/w r/w 1 modinc[1] 0 r/w r/w 0 modinc[0] 0 lsb mod dac twos complement dc current increment setting register address = h0x0d dcinc r r 7 set_idc[0] 0 lsb of set_idc dac register address = h0x08 r/w r/w 4 dcinc[4] 0 msb dc dac twos complement increment/ decrement r/w r/w 3 dcinc[3] 0 r/w r/w 2 dcinc[2] 0 r/w r/w 1 dcinc[1] 0 r/w r/w 0 dcinc[0] 0 lsb dc dac twos complement increment/ decrement mode control register address = h0x0e modectrl r/w r/w 7 modectrl[7] 0 msb mode control r/w r/w 6 modectrl[6] 0 r/w r/w 5 modectrl[5] 0 r/w r/w 4 modectrl[4] 0 r/w r/w 3 modectrl[3] 0 r/w r/w 2 modectrl[2] 0 r/w r/w 1 modectrl[1] 0 r/w r/w 0 modectrl[0] 0 lsb mode control
???????????????????????????????????????????????????????????????? maxim integrated products 33 MAX3948 11.3gbps, low-power, dc-coupled laser driver table 7. register summary (continued) layout considerations the data inputs and outputs are the most critical paths for the MAX3948 and great care should be taken to minimize discontinuities on these transmission lines. the following are some suggestions for maximizing the per - formance of the ic: ? use good high-frequency layout techniques and mul - tilayer boards with an uninterrupted ground plane to minimize emi and crosstalk. ? the data inputs should be wired directly between the module connector and ic without stubs. ? maintain 100 i differential transmission line imped - ance into the ic. ? the data transmission lines to the laser should be kept as short as possible, and must be designed for 50 i dif - ferential or 25 i single-ended characteristic impedance. ? an uninterrupted ground plane should be positioned beneath the high-speed i/os. ? ground path vias should be placed close to the ic and the input/output interfaces to allow a return cur - rent path to the ic and the laser. refer to the schematic and board layers of MAX3948 evaluation kit for more information. exposed-pad package and thermal considerations the exposed pad on the 16-pin tqfn package provides a very low-thermal resistance path for heat removal from the ic. the pad is the only electrical ground on the MAX3948 and must be soldered to the circuit board ground for proper thermal and electrical performance. refer to application note 862: hfan-08.1: thermal considerations for qfn and other exposed-paddle packages for additional information. register function/ address register name normal mode setup mode bit number/ type bit name default value notes fault mask register address = h0x0f fmsk r r/w 6 reserved 1 must be kept at logic 1 r r/w 5 fmsk[5] 1 msb tx fault mask r r/w 4 fmsk[4] 0 r r/w 3 fmsk[3] 0 r r/w 2 fmsk[2] 0 r r/w 1 fmsk[1] 0 r r/w 0 fmsk[0] 0 lsb tx fault mask transmitter deemphasis control register address = h0x10 set_txde r r/w 6 set_txde[6] 0 msb tx deemphasis r r/w 5 set_txde[5] 0 r r/w 4 set_txde[4] 0 r r/w 3 set_txde[3] 0 r r/w 2 set_txde[2] 0 r r/w 1 set_txde[1] 1 r r/w 0 set_txde[0] 0 lsb tx deemphasis transmitter equalization control register address = h0x11 set_txeq r r/w 1 set_txeq[1] 0 tx equalization control r r/w 0 set_txeq[0] 0 tx equalization control
???????????????????????????????????????????????????????????????? maxim integrated products 34 MAX3948 11.3gbps, low-power, dc-coupled laser driver typical application circuits host filter vcc_tx z diff = 100 0.1f 0.1f fr4 microstrip up to 12in serdes supply filter tin+ tin- vsel fault disable bmon toutc vout touta scl sda csel 3-wire interface ep v cct v cc host filter vcc_rx supply filter 10g linear pin rosa 10g dfb-tosa sfp+ optical transceiver sfp+ connector host board 0.1f r mon1 r mon2 z 0 = 25 z 0 = 25 z diff = 100 0.1f 0.1f fr4 microstrip up to 12in MAX3948 ds1878 2.38v to 3.46v tx_fault tx_disable rate select mode_def1 (scl) software 3-wire interface adc mode_def2 (sda) i 2 c v cc (3.3v) 4.7k to 10k
???????????????????????????????????????????????????????????????? maxim integrated products 35 MAX3948 11.3gbps, low-power, dc-coupled laser driver typical application circuits (continued) vcct vsel r1 touta 25i 25i toutc vout sda scl csel sda scl csel 13-bit adc slave i 2 c bias monitor md dfb MAX3948 ds4830 mode_def1 (scl) mode_def2 (sda) vcct vsel r2 touta 25i 25i toutc vout sda scl csel md dfb MAX3948 vcct vsel r3 touta 25i 25i toutc vout sda scl csel md dfb MAX3948 vcct vsel touta 25i 25i toutc vout sda scl csel md dfb MAX3948 v cc (+3.3v) rssi monitor
???????????????????????????????????????????????????????????????? maxim integrated products 36 MAX3948 11.3gbps, low-power, dc-coupled laser driver ordering information chip information process: sige bipolar note: parts are guaranteed by design and characterization to operate over the -40c to +95c ambient temperature range (t a ) and are tested up to +85c. + denotes a lead(pb)-free/rohs-compliant package. * exposed pad. package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range pin-package MAX3948ete+ -40 c to +85 c 16 tqfn-ep* package type package code outline no. land pattern no. 16 tqfn-ep t1633+5 21-0136 90-0032
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 37 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. MAX3948 11.3gbps, low-power, dc-coupled laser driver revision history revision number revision date description pages changed 0 6/11 initial release

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